Light emitting device and a method of making the same

ABSTRACT

A light emitting device includes a heat sinking substrate, an electrically insulating layer, a circuit pattern layer, and at least one light emitting diode (LED) chip. The electrically insulating layer is partially formed on the heat sinking substrate so as to expose a portion of the heat sinking substrate. The circuit pattern layer is formed on the electrically insulating layer. The LED chip is electrically connected to the circuit pattern layer, and is indirectly and non-electrically mounted to the portion of the heat sinking substrate exposed from the electrically insulating layer and the circuit pattern layer. A method of making the light emitting device is also provided.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority of Taiwanese Invention PatentApplication No. 104144659, filed on Dec. 31, 2015.

FIELD

The disclosure relates to a light emitting device, and more particularlyto a light emitting device with a heat sinking substrate, and a methodof making the same.

BACKGROUND

Referring to FIG. 1, U.S. Pat. No. 7,683,474 B2 (hereinafter referred toas the '474 patent) discloses a conventional light emitting diode (LED)device 30 that includes a metal heat sinking base 64, a walled container32 disposed on the metal heat sinking base 64 and defining a surroundedvolume, first and second conductors 40, 42 formed on the metal heatsinking base 64 within the surrounded volume of the walled container 32,a first pad 50 formed on the first conductor 40, a second pad 52 formedon the second conductor 42, at least one LED chip 44 disposed on thefirst pad 50, a wire 48 interconnecting the LED chip 44 and the second.pad 52, and an encapsulant 54 filling the surrounded volume of thewalled container 32.

The first conductor 40 and the second conductor 42 formed on the metalheat sinking base 64 are respectively electrically connected to the LEDchip 44 through the first pad 50 and the second pad 52. Thus, electricpower is supplied to the LED chip 44 through the first and secondconductors 40, 42, and heat generated by operation of the LED chip 44 isalso dissipated by the metal heat sinking base 64 through the first andsecond conductors 40, 42.

However, an adhesive layer (not shown) required to be disposed betweenthe first conductor 40 and the metal heat sinking base 64 so as tosecurely dispose the first conductor 40, which exerts a dual function inelectric power transmission and heat dissipation, on the metal heatsinking base 64. Inclusion of the adhesive layer tends to decrease heatdissipating efficiency of the first conductor 40. Besides, due to thedual function of the first conductor 40, the first conductor 40 performsheat dissipation and electric power transmission at the same time, andheat dissipating efficiency of the first conductor 40 is unavoidablydecreased and cannot he fully exploited. Therefore, there is plenty ofroom for improving the heat dissipating efficiency of the LED device.

SUMMARY

Therefore, an object of the disclosure is to provide a light emittingdevice that can alleviate at least one of the drawbacks of the priorart. Another object of the disclosure is to provide a method of making alight emitting device.

According to one aspect of the disclosure, a light emitting deviceincludes a heat sinking substrate, an electrically insulating layer, acircuit pattern layer, and at least one light emitting diode (LED) chip.

The electrically insulating layer is partially formed on the heatsinking substrate so as to expose a portion of the heat sinkingsubstrate.

The circuit pattern layer is formed on the electrically insulatinglayer.

The LED chip is electrically connected to the circuit pattern layer, andis indirectly and non-electrically mounted to the portion of the heatsinking substrate exposed from the electrically insulating layer and thecircuit pattern layer.

According to another aspect of the disclosure, a method of making alight emitting device includes: partially forming an electricallyinsulating layer on a heat sinking substrate so as to expose a portionof the heat sinking substrate; forming a circuit pattern layer on theelectrically insulating layer; and electrically connecting at least oneLED chip to the circuit pattern layer, and indirectly andnon-electrically mounting the LED chip to the portion of the heatsinking substrate exposed from the electrically insulating layer and thecircuit pattern layer.

BRIEF DESCRIPTION OF THE DRAWINGS

Other features and advantages of the disclosure will become apparent inthe following detailed description of the embodiments with reference tothe accompanying drawings, of which:

FIG. 1 is a schematic cross sectional view illustrating a conventionallight emitting diode device of U.S. Pat. No. 7,683,474 B2;

FIG. 2 is a fragmentary schematic view illustrating an embodiment of alight emitting device according to the disclosure;

FIG. 3 is a fragmentary schematic view illustrating anotherconfiguration of the embodiment;

FIG. 4 is a fragmentary schematic view illustrating a modification ofthe embodiment; and

FIG. 5 is a fragmentary schematic view illustrating another modificationof the embodiment.

DETAILED DESCRIPTION

Before the disclosure is described in greater detail, it should be notedthat where considered appropriate, reference numerals or terminalportions of reference numerals have been repeated among the figures toindicate corresponding or analogous elements, which may optionally havesimilar characteristics.

Referring to FIG. 1, an embodiment of a light emitting device accordingto the disclosure includes a heat sinking substrate 2, an electricallyinsulating layer 3, a circuit pattern layer 4, and at least one lightemitting diode (LED) chip 6.

In the embodiment, the heat sinking substrate 2 has a top surface 22 anda bottom surface 23 opposite to the top surface 22 and is made from ametallic material, such as aluminum alloys and copper alloy, etc. Theheat sinking substrate 2 is formed with a plurality of heat sinking fins21, such as aluminum extruded fins, extending from the bottom surface 23for being in contact with an atmosphere or an external fluid. The heatsinking substrate 2 may be selected from, but not limited to, otherconventional types of heat sinks or combinations thereof. In one form,the top and bottom surfaces 22, 23 of the heat sinking substrate 2 maybe coated with a protecting paint layer, a weatherproof paint layer, anelectrically insulating paint layer, etc. The heat sinking fins 21 arenot coated with the protecting paint layer. It should be noted that theheat sinking substrate 2 may have, but not limited to, a curvedconfiguration that is applicable to a curved. contour of a targetobject, such as a vehicle headlight. In one form, the top surface 22 mayhave a curved surface in contact with an inner curved surface of a carheadlight (not shown). In other words, the top surface 22 of the heatsinking substrate 2, unlike the fins 21, is a curved surface. Theconfiguration of the heat sinking substrate 22 of the disclosure may bemodified based on actual applications.

The electrically insulating layer 3 is partially formed on the topsurface 22 of the heat sinking substrate 2 so as to expose a portion ofthe top surface 22 of the heat sinking substrate 2. The electricallyinsulating layer 3 is made from an electrically insulating material thatmay be selected from epoxy resin, acrylic resin, and so on. Theelectrically insulating layer 3 is desired to have a thickness as thinas possible to reduce the effect of heat conduction while maintainingelectric insulativity. Preferably, the thickness ranges between 20 μmand 40 μm.

The circuit pattern layer 4 is formed on the electrically insulatinglayer 3 and has a predetermined pattern that is based on an equivalentcircuit design of the light emitting device. In one form, the circuitpattern layer 4 includes an active layer 41 which may include a polymer,a catalytic metal, or a combination thereof and which is formed on theelectrically insulating layer 3, and first electroless-plated metallayer 42 which is formed on the active layer 41. In this embodiment, thecircuit pattern layer 4 is exemplified to further include, but notlimited to, a second electroless-plated metal layer 42′. In other words,the circuit pattern layer 4 may include the first electroless-platedmetal layer 42 interposed between the active layer 41 and the secondelectroless-plated metal layer 42′.

The catalytic metal of the active layer 41 may be selected from thegroup consisting of palladium (PD), rhodium (Rh), osmium (Os), iridium(Ir), platinum (Pt), gold (Au), silver (Aq), copper (Cu), nickel (Ni),iron (Fe) and alloys thereof. The first electro less-plated metal layer42 may be made from a metal material selected from the group consistingof copper (Cu), nickel (Ni) and alloys thereof. The secondelectroless-plated metal layer 42′ may be made from a metal materialselected from the group consisting of platinum (Pt), silver (Ag), tin(Sn), gold (Au), palladium (Pd) and alloys thereof, and is used forprotecting the first electroless-plated metal layer 42 from oxidation.The second electroless-plated metal layer 42′ can serve as an electrodefor external electrical connection.

The LED chip 6 is electrically connected to the circuit pattern layer 4and indirectly and non-electrically mounted to the portion of the heatsinking substrate 2 exposed from the electrically insulating layer 3 andthe circuit pattern layer 4. In the embodiment, the LED chip 6 iselectrically connected to the circuit pattern layer 4 in a wire-bondingmanner.

In the embodiment, the light emitting device further includes anelectrically insulating and thermally conductive interlayer 5 interposedbetween the LED chip 6 and the portion of the heat sinking substrate 2exposed from the electrically insulating layer 3 and the circuit patternlayer 4. The interlayer 5 is made from a thermal interface material(TIM). In one form, the interlayer 5 may be selected from one of thermalgrease, a thermal pad, a thermal adhesive, and so on. Therefore, duringthe operation of the light emitting device, heat generated by the LEDchip 6 can be dissipated to the heat sinking substrate 2 through theinterlayer 5. In the embodiment, a number of the LED chip is not limitedto one.

More specifically, the circuit pattern layer 4 is configured to have aplurality of spaced apart triple-stacked portions, i.e., each of thespaced apart triple-stacked portions has a structure of the firstelectroless-plated metal layer 42 interposed between the active layer 41and the second electroless-plated metal layer 42′. The LED chip 6includes a bottom portion 61, a top portion 62 opposite to the bottomportion 61, and two wires 63 that respectively extend from the topportion 62 and are electrically connected to two corresponding ones ofthe spaced apart triple-stacked portions of the circuit pattern layer 4through wire bonding. The two corresponding triple-stacked portions ofthe circuit pattern layer 4 are adapted to respectively serve as apositive electrode and a negative electrode. Since the configuration andthe material of the LED chip 6 are not the essential features of thedisclosure and are known to those skilled in the art, further detailsthereof are not provided herein for the sake of brevity.

Referring to FIG. 3, in another configuration of the light emittingdevice, the LED chip 6 is a vertical-type LED, and the bottom portion 61serves as an electrode. The LED chip 6 includes a wire 63interconnecting the top portion 62 and a corresponding one of the spacedapart triple-stacked portions of the circuit pattern layer 4. In otherwords, the top portion 62 is electrically connected to the circuitpattern layer 4 in wire-bonding manner. The bottom portion 61 of the LEDchip 6 bridges the electrically insulating and thermally conductiveinterlayer 5 and a corresponding one of the spaced apart triple-stackedportions of the circuit pattern layer 4 adjacent to the interlayer 5.

By virtue of the structural design of the light emitting device of thedisclosure shown in FIGS. 2 and 3, heat dissipation and electric powertransmission. of the light emitting device are carried out throughdifferent paths. The heat dissipation path of the light emitting deviceis from the LED chip 6 or the circuit pattern layer 4 to the heatsinking substrate 2 through the electrically insulating layer 3, whilethe electric power transmission path is from the LED chip 6 to thecircuit pattern layer 4. Therefore, the resistivity of the circuitpattern layer 4 will not be undesirably increased due to heataccumulated therein.

Referring FIG. 4, in another configuration of the light emitting device,the light emitting device further includes at least one solder pad 64that is formed on the circuit pattern layer 4. In this implementation,there are two solder pads 64 formed on the circuit pattern layer 4. TheLED chip 6 is electrically connected to the circuit pattern layer 4 in aflip-chip manner. More specifically, the top portion 62 of the LED chip6 is electrically connected to the circuit pattern layer 4 through twosolder pads 64.

Referring to FIG. 5, in the other configuration of the light emittingdevice, the light emitting device further includes at least one solderpad 64 that is formed on the circuit pattern layer 4. The LED chip 6 iselectrically connected to the circuit pattern layer 4 in a flip-chipmanner. The top portion 62 of the LED chip 6 includes a first electrode621, a second electrode 622 that is spaced apart from the firstelectrode 622, and an insulator 623 that is disposed between the firstelectrode 621 and the second electrode 622. The first and secondelectrodes 621, 622 are respectively connected to the circuit patternlayer 4 through a respective one of the solder pads 64.

In this implementation, heat generated by the LED chip 6 can also beefficiently dissipated by the heat sinking substrate 2 through theelectrically insulating layer 3.

Referring back to FIGS. 2 and 3, a method of making the embodiment ofthe light emitting device includes the following steps.

First, the electrically insulating layer 3 is partially formed on theheat sinking substrate 2 so as to expose a portion of the heat sinkingsubstrate 2. In the method, the heat sinking substrate 2 is formed witha plurality of heat sink fins 21. The electrically insulating layer 3 ismade of, but not limited to, epoxy, and its manufactured usingelectro-deposition (ED) coating techniques. It is noted that the portionof the heat sinking substrate 2 formed with the electrically insulatinglayer 3 is a position for the LED chip 6 to be formed on.

Then, the circuit pattern layer 4 is formed on the electricallyinsulating layer 3. More specifically, the circuit pattern layer 4 isformed by forming the active layer 41, after which the firstelectroless-plated metal layer 42 is formed on the active layer 41. Inthe method, the second electroless plating metal layer 42′ is furtherformed on the first. electroless-plated metal layer 42.

More specifically, the active layer 41 is first formed on theelectrically insulating layer 3 using screen printing techniques.

It should be noted that the electrically insulating layer 3 and theactive layer 41 may be also respectively formed using digitech printingtechniques, spraying techniques, transfer printing techniques, dipplating techniques, or powder coating techniques.

Thereafter, the heat sinking substrate 2 cooperated with theelectrically insulating layer 3 and the active layer 41 are dipped in achemical plating bath containing metal ions, in which the metal ions arereduced so as to form a metal nucleus on the active layer 41 and inwhich the metal nucleus serves as a catalytic layer so as to conduct thereduction reaction thereon. Therefore, the first electroless-platedmetal layer 42 is thus deposited on the active layer 41 for apredetermined time and includes a predetermined pattern corresponding inposition to the active layer 41. In addition, the secondelectroless-plated metal layer 42′ may be deposited on the firstelectroless-plated metal layer 42 using the same chemical platingtechniques that are used in the deposition of the firstelectroless-plated metal layer 42.

In the embodiment, the chemical plating bath used in the deposition ofthe first electroless-plated metal layer 42 is a chemical platingsolution containing copper sulfate, such that the firstelectroless-plated metal layer 42 thus deposited is made of copper. Thechemical plating bath used in the deposition of the secondelectroless-plated metal layer 42′ is a chemical plating solutioncontaining silver nitrate, such that the second electroless plated metallayer 42′ thus deposited is made of silver. Since the chemical platingtechniques are well known to those skilled in the art, further detailsthereof are not provided herein for the sake of brevity. Furthermore,the first and second electroless-plated metal layers 42, 42′ may bedeposited using sputtering techniques, another dip plating techniquedifferent from the electroless plating techniques, or evaporationtechniques.

It is noted that the formation of the circuit pattern layer 4 may beconducted. by one of two processes. One of the processes includes:forming the active layer 4 with a predetermined pattern on theelectrically insulating layer 3; and forming on the patterned activelayer 41 the first electroless-plated metal layer 42 that has a patterncorresponding in position to the pattern of the active layer 41 so as tocooperate with the pattern of the active layer 41 to form the circuit.pattern layer 4. The other one of the processes includes: forming anactive layer on the electrically insulating layer 3; forming theelectroless-plated metal layer on a non-patterned active layer; andremoving a portion of the electroless-plated metal layer and a portionof the active layer from a top surface of the electroless-plated metallayer to the active layer using laser techniques or other suitabletechniques, so that the heat sinking substrate 2 corresponding inposition to the etched portion of the electroless-plated metal layer andthe active layer is exposed and the circuit pattern layer 4 is thusformed.

Subsequently, the electrically insulating and thermally conductiveinterlayer 5 is formed on the top surface 22 of the heat sinkingsubstrate 2 that is exposed from the circuit pattern layer 4.

The LED chip 6 is electrically connected to the circuit pattern layer 4and is indirectly and non-electrically mounted to the portion of theheat sinking substrate 2 that is exposed from the electricallyinsulating layer 3 and the circuit pattern layer 4. More specifically,the LED chip 6 is mounted to the heat sinking substrate 2 through theinterlayer In other words, the interlayer 5 is interposed between theportion of the heat sinking substrate 2 and the LED chip 6.

The LED chip 6 is connected to the circuit. pattern layer 4 by a wirebonding process. Since the wire bonding process is well known to thoseskilled in the art, further details thereof are not provided herein forthe sake of brevity.

Referring back to FIGS. 4 and 5, the formation of the interlayer 5 maybe alternatively omitted in a method of making another configuration ofthe light emitting device, and the LED chip 6 is electrically connectedto the circuit pattern layer 4 in the flip-chip manner.

More specifically, two solder pads 64 are formed on the circuit patternlayer 4, and then the LED chip 6 is electrically connected to thecircuit pattern layer 4 through the solder pads 64 by a flip-chipmounting process. Since the flip-chip mounting bonding process is wellknown to those skilled in the art, further details thereof are notprovided herein for the sake of brevity.

In summary, by virtue of the inclusion of the heat sinking substrate 2,the heat can be effectively conducted and dissipated away from the LEDchip 6. Furthermore, by virtue of the interlayer 5 cooperated with theheat sinking substrate 2, a heat dissipation path different from theelectric conduction path is provided. Hence, stability, luminousefficiency and lifetime of the light emitting device can be improved.Additionally, the method of making the light emitting device isrelatively uncomplicated.

In the description above, for the purposes of explanation, numerousspecific details have peen set forth in order to provide a thoroughunderstanding of the embodiment. It will be apparent, however, to oneskilled in the art, that one or more other embodiments may be practicedwithout some of these specific details. It should also be appreciatedthat reference throughout this specification to “one embodiment,” “anembodiment,” an embodiment with an indication of an ordinal number andso forth means that a particular feature, structure, or characteristicmay be included in the practice of the disclosure. It should be furtherappreciated that in the description, various features are sometimesgrouped together in a single embodiment, figure, or description thereoffor the purpose of streamlining the disclosure and aiding in theunderstanding of various inventive aspects.

While the disclosure has been described in connection with what isconsidered the exemplary embodiment, it is understood that thisdisclosure is not limited to the disclosed embodiment but is intended tocover various arrangements included within the spirit and scope of thebroadest interpretation so as to encompass all such modifications andequivalent arrangements.

What is claimed is:
 1. A light emitting device, comprising: a heatsinking substrate; an electrically insulating layer partially formed onsaid heat sinking substrate so as to expose a portion of said heatsinking substrate; a circuit pattern layer formed on said electricallyinsulating layer; and at least one light emitting diode (LED) chipelectrically connected to said circuit pattern layer ant indirectly andnon-electrically mounted to said portion of said heat sinking substrateexposed from said electrically insulating layer and said circuit patternlayer.
 2. The light emitting device of claim 1, further comprising anelectrically insulating and thermally conductive interlayer interposedbetween said portion of said heat sinking substrate and said LED chip,said interlayer being made from a thermal interface material (TIM), saidLED chip being electrically connected to said circuit pattern layer in awire-bonding manner.
 3. The light emitting device of claim 2, whereinsaid TIM is selected from one of thermal grease, a thermal pad, and athermal adhesive.
 4. The light emitting device of claim 1, furthercomprising at least one solder pad formed on said circuit pattern layer,said LED chip being electrically connected to said circuit pattern layerin a flip-chip manner.
 5. The light emitting device of claim 1, whereinsaid circuit pattern layer includes an active layer formed on saidelectrically insulating layer including a catalytic metal material and afirst electroless-plated metal layer formed on said active layer.
 6. Thelight emitting device of claim 5, wherein said circuit pattern layerfurther includes a second electroless-plated metal layer formed on saidfirst electroless-plated metal layer, which is made from a metalmaterial selected from the group consisting of platinum (Pt), silver(Ag), tin (Sn), gold (Au), rhodium (Rh), palladium (Pd), and alloysthereof.
 7. The light emitting device of claim 1, wherein said heatsinking substrate is formed with a plurality of heat sinking finsopposite to said electrically insulating layer and said LED chip.
 8. Amethod of making a light emitting device, comprising: partially formingan electrically insulating layer on a heat sinking substrate so as toexpose a portion of the heat sinking substrate; forming a circuitpattern layer on the electrically insulating layer; and electricallyconnecting at least one light emitting diode (LED) chip to the circuitpattern layer, and indirectly and non-electrically mounting the LED chipto the portion of the heat sinking substrate exposed from theelectrically insulating layer and the circuit pattern layer.
 9. Themethod for making the light emitting device of claim 8, furthercomprising forming an electrically insulating and thermally conductiveinterlayer interposed between the portion of the heat sinking substrateand the LED chip.
 10. The method for making the light emitting device ofclaim 9, wherein the interlayer is made from a thermal interfacematerial (TIM) selected from one of thermal grease, a thermal pad, and athermal adhesive.
 11. The method for making the light emitting device ofclaim 8, wherein in electrical connection of the LED chip to the circuitpattern layer, the LED chip is connected to the circuit pattern layer bya wire bonding process.
 12. The method for making the light emittingdevice of claim 8, wherein in the electrical connection of the LED chipto the circuit pattern layer, at least one solder pad is formed on thecircuit pattern layer and then the electrical connection of the LED chipis electrically connected to the circuit pattern layer by a flip-chipmounting process.
 13. The method for making the light emitting device ofclaim 8, wherein the step of forming the circuit pattern layer on theelectrically insulating layer includes forming an active layercomprising a catalytic metal material on the electrically insulatinglayer, and then forming a first electroless-plated metal layer on theactive layer.
 14. The method for making the light emitting device ofclaim 13, wherein the step of forming the circuit pattern layer on theelectrically insulating layer further includes forming a secondelectroless-plated metal layer, which is made from a metal materialselected from the group consisting of platinum (Pt), silver (Ag), tin(Sn), gold (Au), rhodium (Rh), palladium (Pd), and alloys thereof, onthe first electroless-plated metal layer.